In this lecture, we'll discuss some practical circuits for
driving power MOSFETs. And some of their basic considerations.
So what I've shown here is, as an example, is a synchronous buck
converter. In other words, it's a DC to DC buck
converter that has a main power transistor realized by a moss fit, and the rectifier, or diode, is replaced with a synchronous
rectifier. with Mossvet Q2. This configuration of two Mossvets
actually is is found in many different applications and
circuits besides this one. it's found in quite a few different DC-DC
converters. This is often called a half-bridge
circuit. It's also found in many different DC to AC
inverter circuits. And the fundamentals of driving the
switches really is the same in all of those circuits. but here to keep things simple, we'll discuss the DC to DC synchronous
buck converter. So, we have two transistors that we have
to drive. so the main switch Q1 and the synchronous
rectifier Q2 each are turned on and off by their control
terminals or gates. And the the voltage of the gate must be referenced to the, the voltage at the
source of the same transistor. So to turn Q2 on and off, let's see its
source is connected to ground So it's gate voltage must be
switched with respect to ground. And, and that's relatively easy. On the other hand with Q1, the source of
Q1 is connected to the switch node which is
switching high and low. When Q2 is on switch node is at ground,
and when Q1 is on switch node is at Vg. So, to, to control Q1, we must drive the
gate voltage with respect to the switch node
and drive what the gate voltage must be high, say 12
volts above the switch node when we want to turn Q1
on. And it must be essentially equal to the
switch node voltage when we want to turn Q1 off. So we need to build circuitry that is
connected to the two gates here, to drive the
transistors in that manner. Here's a common way to do it called, this
is called a half bridge gate driver, and we can buy
commercial half bridge gate drivers. That are implemented in high-voltage
integrated circuits that do this. So the half-bridge gate driver really
comprises all of these things inside the box. The half-bridge gate driver contains a
low-side driver. That drives the low-side MOSFET Q2 with
respect to ground, and it contains a high-side
driver that drives the high-side MOSFET Q1 and its
gate with respect to its source, which is the switch
node. Each of these triangles represents,
really, a buffer or a circuit that can produce the high currents needed to switch the
gates. and charge the gate capacitances quickly
at the proper voltage in this example, 12
volts. The high side driver, additionally, has
what's called a bootstrap power supply. This buffer or gate driver circuitry has
to be powered. And it's, it's effective ground is,
connected to the, switch node. An so the power supply to this driver
circuitry Must be 12 volts with respect to the switch node.
And so this diode and capacitor comprise what is called a bootstrap power supply.
When the low side MOSFET Q2 is turned on, then the switch node here is at ground. And what happens is, this bootstrap diode
turns on, and this capacitor is charged to 12 volts through this path,
so we get 12 volts here. Okay?
Then, when Q2 turns off and Q1 turns on, when this, this gate driver turns Q1 on,
the switch node goes high, up to the input voltage, and the
capacitor voltage flies up with it so that the the gate drive circuit for Q1
Is still powered from the 12 volt supply held on
this capacitor. At this point, this diode is off, and the high side driver is powered from
the bootstrapped capacitor. So the boot strap capacitor gets charged
to 12 volts every time the low side transistor
turns on. Something about boot strap power supplies
is that they don't work unless you switch the low side
transistor. You have to turn it on every so often to
charge up this boot strap capacitor, or it will
run out of charge. The gate drive circuitry generally
includes what's called under voltage lockout
protection in which, if the power supply of the, the
driver circuitry is too low, then the, the circuitry will turn off and it
will actually protect the power stage by shorting the, the gate to the source,
and keeping the transistors turned off. So if you ever let this bootstrap capacitor voltage get below the under
voltage lockout of this gate driver circuit, then it will just turn off and
the circuit won't work. So we have to keep switching Q2 occasionally to make sure we charge this
up. Now under normal operation, we're
switching Q1 and Q2. On and off at the switching frequency and
that's no problem. Okay, some more things we need in this
circuit. this logic input is a control signal that
goes high and low and it commands Q1 and Q2 to turn on
and off. Amplifiers to make them turn on and off in
this way. Likewise, when the logic input is low, we
want Q1 off and Q2 on. Okay, this logic signal typically is
referred to this ground, and so it will go high and low with respect to
ground. And the, this upper block must also then
perform the function of level shifting. It has to level shift this signal up to
this node voltage to provide the proper signals at the input of this buffer.
Something else we have to do, is we have to make sure that we never turn
both Q1 and Q2 on at the same time. If we ever do that, then they'll short out
our input voltage, what we've been calling bg, and even if they're on
for a few nanoseconds at the same time, during those few nanoseconds we
can get a large current spike that flows through the two transistors, that
can be many, many amps, and that current spike can damage the transistors and make
the circuit fail. Or at the very least it will cause a large
amount of power loss. So what we do is this logic circuitry,
these boxes also implement what is called break before make operation
or non-overlapping conduction circuitry.
Which make sure that first first you turn the on or conducting transistor
off. We wait some amount of time called a dead time, and then we turn the other opposite
device on. So, both devices are off for some short
amount of time That is long enough to make sure that,
when we account for switching times and driver delays and
things, we never have the case where both transistors can be on
at the same time. Okay, let's consider what happens, let's
suppose we had Q2 on and we want to turn it off, so our logic
signal will start out low. Q2 is on, then we, we go to switch the
logic signal high. There is some dead time. And then we turn Q1 on.
So one question is, what happens during the dead time?
Which our device conducts if any. Okay, well the answer is during the dead
time the inductor current continues to flow and we can't
interrupt the inductor current. We're, let's assume here that the inductor current is positive and flowing to the
output. If we have a positive input and a positive
output voltage then the inductor current will
flow in this direction. If both transistors are off the inductor
current has to flow somewhere, well the only place it can flow then is through D2, through this body
diode. The inductor current will forward bias the
body diode, and it will conduct during the dead time and the switch volt no voltage
VS will remain low with D2 conducting. Then right here where we turn Q1 on the, the upper gate driver will turn Q1
on. And what it does then is we have current
flowing this way that will both make D2 go through a reverse recovery, and cause
switching loss, and also it will supply the inductor
current. After the reverse recovery of D2 is done,
D2 will be off, and then Q1 will conduct and supply
the inductor current. So we have switching loss that happens, even with
synchronous rectifiers because of the need to have dead times, we get switching loss
caused by the body diodes. Let's consider some further details about
the switching times, and exactly how these
devices switch. If you recall from the last lecture we
discussed the capacitances of the MOSFET, and we drew
this circuit here. Where we explicitly showed the MOSFET with
its body diode, and with a three capacitances, gate drain and gate resource
capacitance, and the output or drain resource
capacitance. to understand what happens during the
switching times, we also need to model the driver And understand how the driver
circuit interacts to charge and discharge this
capacitances. So here's our, our driver's symbol and
what I'm going to do is represent the driver output terminals here, with a
simple Thevenin-equivalent model. Here, in which we model the output terminals
with some Thevenin-equivalent voltage source,
and some Thevenin-equivalent resistance. Okay, we know the Thevenin-equivalent
voltage is simply the open circuit output voltage, which is something that will switch
between zero and in this case 12 volts. And r Thevenin is the Thevenin-equivalent
output resistance of the driver. Now, real drivers are more complicated than this, but this
is actually a reasonably good first order model that explains all of the
things we want to talk about today. And in a typical driver, we can think of
this Thevenin-equivalent resistance as being the on resistance of the MOSFETs
that are inside the driver. That are driving the output terminal of
the, of the of the chip. its traditional to rate drivers according
to the peak current that they can produce at
their output. And so if we buy a driver that's rated at
12 volts and one amp for example then this thevenin equivalent resistance would be 12
volts divided by the one amp or 12 ohms. Okay. So, our actual circuit then drives the
gate to source of the MOSFET With this
Thevenin-equivalent. So what I've done here is to insert the gate driver, Thevenin-equivalent model in, in
place of the low side driver, and I've replaced the MOSFET
with an equivalent circuit model that contains the
capacitances, the body diode. And here we have a dependant current
source that models how the drain current depends on
the gate voltage. Let's consider the trangant in which we
turn off the lower MOSFET, wait for some dead time, and then turn on
the upper MOSFET. So we're going to draw some waveforms. Here's our Thevenin-equivelent driver
voltage that we'll start out high, so that the lower MOSFET Q2 is on. So, it's 12 volts, and under these
conditions The gate to source voltage of Q2, this voltage here, is is high also,
and is equal to 12 volts. Okay. The switch node voltage vs of t is equal
to ground because the lower MOSFET is on, and at this point what we'll do This will make our driver switch low.
So the Thevenin-voltage goes low. We have an RC circuit where the Thevenin
resistance is connected across Vgs and it will pull current out of
the, this gate. And discharge these capacitors.
So they'll be some kind of RC type decay, and voltage will go low. [SOUND]. Okay?
When the lower MOSFET is off. Recall the body diode is still on, to
cnoduct the inductor current, and that will keep this vs switch
node voltage low. Okay, and it will stay low for the dead
time, so here is the dead time. Or perhaps even, we should call this whole
time here the dead time. Okay, at this point, the upper gate driver
turns Q1 on. So what happens when it turns Q1 on is the upper MOSFET will try to pull this
node high. Now, as we just mentioned a few minutes
ago, this makes the body diode of Q2 undergo a reverse
recovery, and so it takes some time for that reverse
recovery to happen before this voltage at this node
can start to rise, but eventually, it does rise. I'm sorry, that's VGS It's VS that eventually rises. Okay. Now, when VS is rising, what happens to
the charge on this gate capacitance, CGD? You can see that this node here is all of
a sudden going high. We're trying to hold VGS low.
So that means the voltage across this capacidence
has to increase along with the drain voltage. Okay so if the voltage on the CGD
increases It means current must flow through GCD, according
to i is CDVTV for this capacitor, to charge the capacitor. So we have current flowing in this
direction through CGD. Now, the big question is, once that
current gets to the node here at the gate, Where does it go
from there? It has to keep, it has to complete the
loop an keep flowing someplace. Okay, now where can it flow?
Can it flow this way? Well, we hope it does. We, we hope the gate driver, keeps pulling
this node down to ground an keeps this MOSFET
off. But the trouble is, we initially, the
voltage here is zero, so we have zero volts here, and we have zero volts here,
coming out of this the driver. Or V thevanin is zero.
So you can see right there. So there's no voltage across our R thevanin. And if there is no voltage across this
resistor, then by ohms law there is no current through
the resistor. So, we have zero amps of current flowing
through the resistor. What that means is that the only place
that this current can go is this way. Through CGS. And because of that, CGS will start to
charge also, and we'll see VGS rise.
Well that's not good, if EGS rises above the threshold voltage of, of the
gate, call it VTHR. then, then this transistor will start to
turn on again. And when it turns on again, then it tries
to pull this node back down. And what happens is we get oscillations. Where this transistor will turn on and off
many times. And we get all kinds of switching loss in
the process. So, the gate to drain capacitance causes
problems. And it's a common problem to, that we have to battle when we're designing these kind
of circuits. it's typical for the total charge in the
gate to drain capacitance. Can be equal or even greater than the total charge and
CGS. So there's a lot of charge here, and it's
easy for that charge if it all flows this way, to start
charging up CGS. Well the hope here is that when this
voltage rises a couple of volts, then we do get, start to get current flowing through the Thevenin-resistance and
through the gate driver. And if the Thevenin-resistance is low
enough, we hope the gate driver can hold this node voltage
low enough that the Q1, or Q2 doesn't turn back on.
Another thing we can do to help the situation is to slow down the speed at
which Q1 turns on. And so we can put a resistor in the gate
of Q1 that makes it turn on more slowly, and makes the
voltage at this node rise more slowly. So DVDT is lower, and since i is CDVDT in
this capacitor, we get less current here, and it's easier
for the gate driver to To pull that current out of the gate and
keep the transistor turned off. So you'll often see little resistors of a
few tens of ohms put in series with the gate. We often will put a diode in that direction, so that the resistor slows down
how fast the tra, Q1 turns on but the diode let's
the driver turn to an off very quickly. Okay so that was the switching transition
where Q2 turns off and then we have D2 conducting during the dead
time, and then Q1 turns on And during this time, we saw that we get
switching loss [SOUND] caused by the reverse recovery of the body
diode, D2 as well as by shorting out the output
capacitances of the devices. And possibly but hopefully not also from
oscillations in spurious switching caused by the CGD
problems. Let's now examine the other transition
where we turn the Q1 off and Q2 on. So here we have Q1 initially conducting,
which makes the switch node high, and equal to the input
voltage VG. When we turn Q1 off. What happens?
Who conducts then? Well, again, we have positive current
flowing in the inductor, both transistors are off,
and this positive inductor current has to flow
somewhere, and it will flow out of D2. The body diode D2 is the only remaining
diode, or only remaining semiconductor device, that
can conduct current in that direction. So we get Q1 turning off then D2 turns on
and Q2 turns on. What happens to the, the charge on the
output capacitances of the MOSFETs. [NOISE] When we turn Q1 off, what happens is the inductor current can
discharge these capacitors, and that current, conductor current will
actually discharge this node down to ground. So we turn Q 1 off here [SOUND] And let's assume we have a nice big gate
driver that can turn Q1 off quickly and, in fact,
let's assume that the gate, if we get a big enough gate driver,
we can turn Q1 off before the inductor has, current
has a chance to discharge. Voltage at this node by very much. So Q1 gets turned off right away while there'e still very little voltage across
key one. The voltage is held close to zero by its
capacitance. And so then the inductor discharges this
node down to ground discharging the. Energy in these capacitors, when we get
down to ground, then, the diode D2 will turn
on. And then at some point, later, after the
deadtime is over, our Q2 gate driver will turn on and turn
Q2 on. What I've just described here, actually doesn't have any mechanism for switching
loss. Q1 turns off quickly, the capacitance,
nothing else, the straight, the alpha capacitance CDS, holds the voltage across
Q1 to be close to zero. During the turn off switching time of Q1,
and then the inductor actually recovers the energy that
was stored in these capacitors, and that energy flows to the load. And there's no reverse recovery of a
diode. We have D2 turning on, but no diode
turning off. So, there is no switching loss at this
transition and this switching transition of Q2, I'm sorry this one, Q1 D2 Q2 is what we call a zero voltage
switching transition. So, zero voltage switching.
can happen in a situation like this where the voltage across the MOSFET
is held close to zero during its switching transition, and
we have no mechanism for switching loss. Now, the other transition in the other
direction Was what we call hard switch and it has switching laws from
diode reverse recovery and the other things we talked about. So this converter here is what we would
call a hard switched converter. There are converter circuits that get zero
voltage switching at both transitions. And those are called slot switching or
zero voltage switching converters. and they can have considerably higher
efficiency because most of the mechanisms of switching loss have
been eliminated. Circuits that achieve zero voltage
switching at both switching transitions are more
complicated than the one we're talking about here and
they're beyond the scope of this course. They're actually the subject of an entire different course that we teach at
Colorado. however it's interesting that even the
basic hard switched but convertor with Mosfets and good gate
drivers one of the transitions. is essentially loss less and it's only the other transition where we have substantial
switching loss.