In this lecture, I'm going to summarize
another example that is similar in many ways to the example
of the last two lectures. Except it has a more recent and
practical application along with some simulations to
show the actual performance. This is a point of load regulator made
with a synchronous buck converter. So we have a synchronous
rectifier in our buck converter. The output voltage is 1.8 volts
to supply the digital chips. And, the input voltage is five volts. Our output current can vary
anywhere from zero to five amps. In this kind of converter,
it is important that the loop be able to respond quickly
to variations in load current. And in fact the processor may
change its load current much, much faster than the bandwidth
of the feedback loop. And so we invariably have to put
many capacitors around the processor chip in order to maintain adequate
voltage regulation at high frequency. And have a sufficiently low output
impedance driving this chip. Still, the faster we can make our
converter, the less capacitor we need and the capacitors that can work in
this application can add up and be fairly expensive. So we see a lot of applications
such as this nowadays with buck converters that operate
at a low duty cycle. And in fact we may have parallel connected buck converters to
supply the full current. These parallel connected converters
are generally phase shifted so that their ripples, the inductor current
ripples, will cancel approximately, and so that we can have a faster transient
response using small value inductors. So in this example,
we're going to model the capacitor. It's 200 microfarads of
a capacitor with an effective equivalent series resistance
of 0.8 milliohms. We'll have a 1 megaherz
switching frequency, which is a pretty typical number for
this kind of converter nowadays. And our inductor for
this converter is 1 microhenry which should give us a pretty fast
transient response in our output current. Here's our equivalent circuit model for
the Buck converter. Here I have, dependent sources
where the transformer goes, and the equivalent circuit model of
the inductor with its loss resistance and the capacitor with the TSR. This circuit has three resistive elements,
so it's a little bit of work
to calculate the Q factor. I'm not going to go into it here, but there's another approximation we haven't
discussed called the high Q approximation, where when we have both series loading and
parallel loaded damping resistors for a series
resonant and parallel resonant circuits. If they're both present in this circuit,
then the high Q approximation says that the overall Q is approximately
the parallel combination or inverse addition of the two individual Qs. This is a good a good approximation when the product of the Qs is
substantially greater than one. So we work out our corner frequencies. This LC circuit has a corner
frequency of 11 kilohertz. The overall Q with all
three resistive elements works out to be no more than 2.3,
or 7.2 dB. And the ESR causes a zero
in the transfer function. At the corner frequency of the ESR and
capacitor, given by 1 over 2 pi ESR times C,
or 1 megahertz. Let's work out the uncompensated loop
gain then and design a compensator. This goes very similar
to the previous example. With no compensator then, our overall
loop gain will be the control two alpha transfer function, GBD, multiplied
with the pulse with modulator gain, multiplied by the compensator gain of one. And in this low voltage
output of 1.8 volts output, we don't need to divide the voltage down. So our H is one. Here are the Bode plot asymptotes
then of the uncompensated loop. Our DC gain is five,
which is not very high. We have our poles at 11 kilohertz, and
then we have a 40 db per decade slope after that,
until we get to the ESR 0 at 1 megahertz. And here are the phase asymptotes. When the one megahertz switching
frequency and with the need for wide bandwidth of this feedback loop,
we're going to attempt to obtain a crossover frequency of 100 kilohertz or
one tenth of the switching frequency. This is an aggressive choice. So at that frequency of 100 kilohertz,
here is our uncompensated loop gain. It's something below minus
20 dB at that frequency, so we will need some extra gain in our
compensator to bring this gain up to 0 dB. For verification, here's a MATLAB plot of
the exact magnitude and phase response. And you can see indeed that
it does follow the theory. And our phase at 100 kilohertz
is basically minus 180 degrees. And we have next to no phase margin. We'll proceed in a design, just as in
the previous example, with a crossover frequency of 100 kilohertz and
a desired phase margin of 53 degrees. We need our lead compensator then to look
like this, where this is 100 kilohertz, and we're going to want 53 degrees of
phase lead out of our compensator. So that we get that phase margin. When we plug into our
compensator formulas from earlier lectures, we find that we need
a zero frequency here at 33 kilohertz. And the poll frequency at 300 kilohertz. This gain at this point will
need to be 20 something dB. And when we work it out,
we find that the DC gain of our compensator needs
to be 15 dB at this point. So then here's the summary
of the compensator gain. Another thing I would point out here
is that this lead compensator works out to need a high frequency gain of 49,
or 34 dB. And a practical implementation then
would mean that we have an added high frequency pull at,
say ten times the crossover frequency or
at 1 MHz with a gain of 49 at 1 MHz. So we need op amp then with
a gain bandwidth product of at least 49 MHz in order to
realize this compensator. This is getting to be a pretty high
frequency and more expensive op amp. It's a non trivial op amp. And we're going to need very good
layout to get this compensator to work. Here then is a plot of
the compensated loop gain. The orange asymptotes here
are the compensator phase. And when we add those to
the blue asymptotes which was the uncompensated loop, then we get the green asymptotes which
is the compensated loop phase response. And here at a 100 kilohertz, or the crossover frequency,
we get our required phase margin. This compensator also
increases the loop gain so that we cross over at 100 kilohertz. Once we've done this, it's now time to
add the pi part of the compensator. The DC gain of 28.7 is not bad,
but we could do more by simply adding an inverted zero to get
the pi compensation as well, and improve the low frequency regulation. As before, we will add
an integrator at low frequency. We're going to choose this
corner of our inverted zero to occur at less than one tenth
of the crossover frequency. And here the choice was made
to make it eight kilohertz. So, with that addition of the PI
compensator, then here is our overall loop gain response including
this eight kilohertz inverted zero. And here is verification with a MATLAB plot of the overall loop
gain magnitude and phase. MATLAB including variation,
deviations from the asymptotes, predicts a crossover frequency of
105 kilohertz with a phase margin of 51.6 degrees. Now, given that design, what I want to
discuss now that is new in this example is to verify the closed loop responses and
plot some transient responses. So first we'll talk about the reference
to output transfer function, 1 over aht over 1 plus T. And recall, for this example, H is 1. So here in blue where
the asymptotes of the loop gain T. And in green then is the transfer
function in reference to output, which is T over 1 plus T, so
we have a low frequency asymptote of 0dB. The crossover frequency
here at 100 kilohertz, and then we follow t after that. Here is a MATLAB plot of that function. You can see that it indeed
looks as advertised. There's a little bit of peaking
in the vicinity of 100 kilohertz, which comes from the phase margin of
51.6 degrees, so Q is close to one. And there's a little
bit of resonance there. Here's a simulated plot
of the step response. So what we're doing here is applying a ten
milivolt step in the reference voltage. We ref from 1.79 to 1.8 volts and back. So the output voltage
steps from 1.79 up to 1.8, and then here it steps back to 1.79. This is the resulting inductor
current variation and this is the duty cycle variation. One thing you can see here is that the
duty cycle must take a jump, and there's a little spike in duty cycle, in order to
get the voltage to change this quickly. And, in fact,
we can zoom in on the response here, and what we can say is that the duty
cycle doesn't actually saturate. If we applied a larger
step change in voltage, the duty cycle would hit the maximum value
that the pulse width modulator can make, maximum of D of one or
perhaps something less than that. And if it did saturate, then our transient
response would not look like we expect. But since this step is small enough,
the duty cycle doesn't saturate, and actually we see a step response with an
overshoot that is commensurate with the Q of 1 that we get from our
phase margin of 51.6 degrees. So this overshoot plus the ripple,
switching ripple, are exactly what our small
signal models would predict. Next let's plot the output impedance. And then plot the response to
a step change in load current. If we set our independent sources
in our converter model to zero, then the model reduces to
this equivalent circuit. And we can work out the open
loop output impedance from this. Basically we have the parallel
combination of the two branches. And we can construct the asymptotes for
that parallel impedance. Here are all the asymptotes. The inductor, capacitor, the load
resistance, and the ESR down here. So first we find the series combination of
the inductor resistance and the inductor, which will follow this. And then we put that in parallel
with the ESR and the capacitor. Here's the ESR and the capacitor. You take the smaller of the two for
the parallel combination and we get the red asymptotes
with some Q factor there. At DC then, the output impedance is
dominated by the inductor resistance for these numbers. And at high frequency, the output impedence is dominated
by the ESR of the capacitor. Next, let's construct the closed
loop of output impedence. So here is our T. Here is 1 over 1 plus T. Which you recall is 1 above
the crossover frequency, and it follows 1 over T below
the crossover frequency. Then we need to multiply this
1 over 1 plus T function by the open loop output impedance to
get the closed loop output impedance. Here is that computation. So this is our 1 over 1 plus t, and this one is our open
loop output impedance. And what we need to do then
is multiply the orange asymptotes by the blue asymptotes. They're shown in green. So here we follow the open
loop output impedance above the crossover frequency. And below the crossover frequency, this
open loop output impedance gets multiplied by the 1 over 1 plus T function, and
we get asymptotes then that do this. So you can see that the maximum value
of the output impedance happens at the crossover frequency, right there,
and at some frequencies below that. In fact, from working out the asymptote, it works out that we're at eight milliohms
right there at the crossover frequency. Which is in fact the value of
the capacitor impedance at the crossover frequency. It's just below minus 40 dB ohms. And at lover frequencies and
higher frequencies, we have lower impedance than that. What would you expect
then would be the voltage deviation that would be caused by
a step change in load current? Well, perhaps it's hard to do the inverse
laplace transform in you head. But one thing I can say,
just as a first order approximation, the step change in load current has
a wide spectrum of frequency components, and ones at these frequencies
where the output impedance is maximum will have the most
effect on the voltage deviation. For verification here is a MATLAB plot
of the closed loop output impedance. And you can see that it does indeed
look like the asymptotes that I constructed on the last slide, with a similar kind of maximum
that's just under minus 40 dB ohms. And with a little bit
of peaking right here at the crossover frequency in
the vicinity of 100 kilohertz. And here it is a MATLAB plot of the
response to a step change in load current. So here that we're making the load
current change from two and half to five amps and back. So it does this. In response to that, here is the transient
that we get in the output voltage, in the inductor current and
in the duty cycle. And the output voltage transient
is magnified right here. First of all, you can see that the
settling time is about tem micro seconds. So that's the time from here to here. And that time is commensurate with
our loop bandwidth of 100 kilohertz. In addition, the magnitude of the voltage deviation
is about 15 millivolts. From 1.8 volts,
it dips down to 1.785 volts. So if we take a 2.5 amp change in current. And multiply that by this maximum
output impedance of 8 milliohms, that works out to be what, 20 millivolts. So that's this rule of thumb, approximate estimate of how large
the voltage variation will be. OK, we actually have 15 millivolts instead
of 20, according to the simulation. But if we wanted to reduce this
step change, we would need a yet higher crossover frequency or we
would need more capacitance on our output. One or the other in order to reduce the
maximum output impedence of our converter. So I've illustrated another example. This is a fairly up to date
point of load power converter, it is a challenging design,
and requires good engineering. You need to know what you're doing. As far as working out the closed loop
responses and closed loop output impedances, in order to meet the kind of
demanding specs that we have nowadays for these kinds of power systems.